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B. V. V. Sangha’s

Basaveshwar Engineering College (Autonomous), Bagalkot

Department of Computer Science and Engineering

Scheme of teaching for 3rd Semester

(2015-2016 to 2017-2018 Admitted Batches)

|Sl.No. |Subject Code |Subjects |Hrs/Week |C |CIE |SEE |Total |

|1 |UMA301C|Engine|4 |0 |0 |4 |50 |

| | |ering | | | | | |

| | |Mathem| | | | | |

| | |atics-| | | | | |

| | |III | | | | | |

L : Lecturer Hours per Week T : Tutorial hours per week

P : Practical Hours per Week C : Credit points

CIE : Continuous Internal Evaluation

SEE : Semester End Examination

Note: Diploma lateral entry students have to additionally register for EVS.



4 Credits (4-0-0)

Course Objectives:

To enable the students to apply the knowledge of Mathematics in various engineering fields by making them

1. to understand the method of solving algebraic, transcendental equations .

2. to determine the approximate value of the derivative & definite integral for a given data using numerical techniques.

3. able to expand the given periodic function defined in the given range in terms of sine and cosine multiple of terms as a Fourier series.

4. able to extremise the functional using integration technique.

5. able to form and solve the partial differential equation using different analytical techniques.

6. to solve different forms of heat and wave equations.

Course outcomes:

On completion of this course, students are able

1. to know how root finding techniques can be used to solve practical engineering problems.

2. to apply the concept of numerical analysis to find the relative strengths and weaknesses of each computation method and know which are most applicable for given problem.

3. to apply the analytical technique to express periodic function as a Fourier sine and cosine series.

4. to apply partial differential techniques to solve the physical engineering problems.

5. to implement integration technique to determine the extreme values of a functional.


Numerical Analysis: 13 Hours

Bisection Method, Newton-Raphson method.Finite differences, forward and backward difference operators (no derivations on relations between operators) Newton-Gregory forward and backward interpolation formulae. (without proof), Lagrange's and Newton's divided difference interpolation formulae (without proof) Numerical differentiation using Newton's forward and backward formulae-problems.

Numerical solutions offirst order ODE:


Numerical integration: 13 Hours

Trapezoidal rule, Simpson's one third rule, Simpson's three eighth rule and Weddle's rule (no derivation ofany formulae)-problems.

Fourier Series:

Periodic functions, Conditions for Fourier series expansions, Fourier series expansion of continuous and functions having finite number ofdiscontinuities, even and odd functions. Half-range series, practical harmonic analysis.


Fourier transforms: 13 Hours

Infinite Fourier transforms and inverse Fourier transforms- simple properties, complex Fourier transform, Fourier sine and Fourier cosine transforms, Inverse Fourier sine and cosine transforms

Calculus of Variations


Partial Differential Equations: 13 Hours

Formation ofpartial differential equations by elimination of arbitrary constants and arbitrary functions, Solution ofequation ofthe type: Pp + Qq = R, Charpit's method. Solution ofPDEs by the method of separation ofvariables.

Derivation of one-dimensional heat and wave equations. Numerical solutions ofone-dimensional heat and wave equations by explicit method, Laplace equation by using standard five point formula.


2. Numerical Methods for Engineers by Steven C Chapra &Raymond P Canale.

3. Higher Engineering Mathematics by Dr. B.S. Grewal, Khanna Publishers, New Delhi.

4. Advanced Engineering Mathematics By H. K. Das, S. Chand & company Ltd. Ram Nagar, New Delhi.

5. Advanced Engineering Mathematics by E Kreyszig ( John Wiley & Sons)

Question paper pattern for SEE

1. Total of eight questions with two from each unit to be set uniformly covering the entire syllabus.

2. Each question should not have more than four subdivisions.

3. Any five full questions are to be answered choosing at least one from each unit.


Hrs/Week: 04 CIE Marks: 50

Total Hrs: 48 SEE Marks: 50

Course Outcomes : At the end of the course ,the student should be capable to

1) Demonstrate understanding of storage classes, dynamic memory allocation, structures, pointers, strings, files,bitwise operators and abstract data types

2) Design and develop programs using pointers, structures, unions ,bitwise operators

3) Demonstrate understanding of abstract data types and create recursive solutions based on the need

4) Analyze and implement linear & non linear data structures like stacks, queue, linked lists, graph and demonstrate their applications

5) Identify and combine relevant data structures to develop solutions for a given problem

UNIT I 12 Hours

Pointers: Concepts, Pointer variables, Accessing variables through pointers, Pointer declaration and definition, Initialization of pointer variables, Pointers and functions, Pointer to pointers, Compatibility, Lvalue and Rvalue, Arrays and pointers, Pointer arithmetic and arrays, Passing an array to a function, Memory allocation functions, Array of pointers, dynamic array, Strings and pointers , array of strings, string manipulation functions.

Derived types Enumerated, Structure and Union: The type definition, Enumerated types, Structure, Accessing structures, Complex structures, Array of structures, Structures and functions, Unions, pointers to structures.

Files: Revision of file concepts, character i/o functions ,Classification of Files, ,creating ,reading, printing and copying text file, Using Binary Files, Standard Library Functions for Files.

Bitwise operators: logical bitwise operators, shift operator, bitwise use.

Preprocessor directives: File inclusion, macro definition, conditional compilation.

Command line arguments: Definition and use.

Storage classes: Types and type qualifiers.

Separate compilation: Writing separate compilation units, procedures for separate compilation units, Concept of problem solving using C tools.

UNIT II 12 Hours

Introduction to Data Structures :Basic concepts, Pseudocode: Algorithm header, Purpose, Conditions and Return, Statement Numbers, Variables, Statement constructs, sequence, selection, loop, Psuedocode example, The abstract data type: Atomic and composite data, Data type, Data structure, Abstract data type, Model for an abstract data type: ADT operations, ADT data structures, ADT Implementations: Array implementation, Linked list implementation, Pointers to linked lists, Generic code for ADTs: Pointer to void, Pointer to Function: Defining pointers to functions, Using pointers to functions.

Linear Lists: Stacks: Basic stack operations: Push, Pop, Stack top, Stack linked list:Implementation, Data structure, Stack head, Stack data node, Stack algorithms, Create Stack, Push Stack, Stack top, Empty Stack, Full Stack, Stack count, Destroy Stack, C language implantations: Insert data, Push Stack , Print Stack, Pop character, Stack ADT: Data structure, ADT Implementations, Stack structure, Create stack, Push stack, Pop stack, Stack top, Empty stack, Stack count, Destroy stack, Stack applications: Reversing data, Reverse a list, Convert decimal to binary, Infix to postfix transformation, Evaluating postfix expressions.

Recursion: Factorial- A case study: Recursion defined, Iterative solution, Recursive solution,Designing Recursive algorithms: The design methodology, Limitations of recursion, Design implementation- Reverse keyboard input, Recursive examples: Greatest common divisor, GCD design, GCD C implementation, Fibonacci Numbers, Design, Fibonacci C implementation, How recursion works.

UNIT III 12 Hours

Queues: Queue Operations: Enqueue, Dequeue, Queue front, Queue rear, Queue example, Queue Linked list design: Data structure, Queue head, Queue data node, Queue algorithms, Create queue, Enqueue, Dequeue, Retrieving queue data, Empty queue, Full queue, Queue count, Destroy queue, Queue ADT: Queue structure, Queue ADT algorithms, Queue Applications

General Linear lists: Basic operations, Insertion, Deletion, Retrieval, Traversal, Implementation: Data structure, Head node, Data node, Algorithms, Create list, Insert node, Delete node, List search, Retrieve node, Empty list, Full list, List count, Traverse list, Destroy list, List ADT: ADT functions, Create list, Add node, Internal insertion function, Remove node, Internal delete function, Search list, Internal search function, Retrieve node, Empty list Full list, List count, Traverse, Destroy list, Application: Data structure, Application functions, Mainline, Print instructions, Compare year, Complex Implementations: Circularly linked lists, Doubly linked lists, Insertion, Deletion.

UNIT IV 12 Hours

Non-Linear lists: Trees: Basic tree concepts, Terminology, User representation, Binary trees:Properties, Height of binary trees, Balance, Complete and Nearly complete binary trees, Binary tree traversals, Depth-first traversals, Breadth-first traversals, Expression Trees, Infix traversal, Postfix traversal, Prefix traversal, Huffman code, G Binary search trees: Basic concepts, BST operations: Traversals, Searches, Find the smallest and largest node, BST search, Insertion, Deletion, Binary search tree ADT, Data structure, Head and node structure, Algorithms, Create a BST, Insert a BST, Internal insert function, Delete a BST, Internal delete function, Retrieve a BST, Internal retrieve function, Traverse a BST, Internal traverse function, Empty a BST, Full BST, BST count, Destroy a BST, Internal destroy function.Graphs: Basic concepts, Operations: Insert vertex, Delete vertex, Add edge, Delete edge, Find vertex, Graph storage structures: Adjacency matrix, Adjacency list.

Text Books:

• Behrouz A. Forouzan and Richard F. Gilberg , 2nd Edition, Thomson, 2003, ComputerScience A Structured Programming Approach Using C, (Chapter 4:4.1 to 4.5, Chapter7:7.17.3, Chapter 9:9.1 to 9.9, Chapter 10:10.1 to 10.7, Chapter 11:11.1 to 11.5, Chapter 12:12.1 to 12.8, Chapter 13.1 to 13.3, Chapter 14, Chapter 15:15.1 to15.3,Appendix G, I, J, K,L)

• Behrouz A. Forouzan and Richard F. Gilberg, 2nd Edition, Cengage Learning Publisher, 2005. Data Structure A Pseudocode Approach with C, (Chapter 1(1.1-1.5), 2,3,4 (4.1-4.4), 5, 6(6.1-6.2 )7(7.1-7.3), 11)

Reference Books:

1. Basavraj S Anami, Shanmukhappa Angadi, Sunil Kumar S Manvi, PHI Publications, 2010. Holistic approach to learning C.

2. Andrew Tenanbaum, Thomson, 2005, Data Structures with C. Pearson ,Robert Kruse & Bruce Leung, Data Structures & Program Design in C


|Hrs/Week :04 | |CIE Marks:50 |

|Total Hrs:48 | |SEE Marks:50 |

Course Outcomes

At the end of the course the student should be able to ,

|CO 1. |Demonstrate the understanding of Boolean algebra. |

|CO 2. |Explain the working of combinational/sequential circuits, op-amp, ADC and DAC. |

|CO 3. |Apply the Boolean theorems, K-Map and Q-M Method to design minimal circuits. |

|CO 4. |Design arithmetic circuits, code converters etc using MSI digital ICs. |

|CO 5. |Simulate simple logical and combinational circuits using Verilog programming. |

UNIT-I (12 Hours)

Boolean algebra and combinational networks:

Boolean algebra- Definition, principle of duality, Boolean algebra theorems, The two valued Boolean algebra Boolean formulas and functions- normal forms Canonical Formulas- Minterm canonical formula, m-notation, Maxterm Canonical formulas, M-notation Manipulation of Boolean formulas Gates and combinational networks Incomplete Boolean functions and don’t care conditions, Additional Boolean operations and gates, Introduction to HDL

Simplification of Boolean expressions:

Formulation of the Simplification problem Prime Implicants and Irredundant Disjunctive expressions Prime implicates and Irredundant conjunctive expressions Karnaugh maps Using K-map to obtain minimal expression Minimal expressions for incomplete functions. HDL implementation of logic circuits.

UNIT-II (12 Hours)

The Quine-McCliskey method of generating prime implicants and prime implicates Decimal method for obtaining prime implicants/implicates Variable Entered K-map. Design of code converters, adder / substractor , multiplexer / demultiplexer , comparator and other circuits .

Logic Design with MSI components and programmable logic Devices:

Decimal Adders Comparators Decoders Encoders Multiplexers, PLDs, PROM, PLAs PALs , HDL implementation of data processing circuits.

UNIT-III (12 Hours)

Flip-Flops and applications:

Basic bistable element Latches Master Slave Flip-Flops Edge Triggered Flip-Flops Characteristic equations Registers Counters Design of Synchronous Counters.,

Synchronous Sequential networks:

Structure and operation of clocked Synchronous sequential networks Analysis of clocked Synchronous sequential networks,HDL implementation of flipflops, registers and counters.

UNIT-IV (12 Hours)

Op-Amps and D/A -A/D conversion: Introduction to operational amplifiers

Introduction, the operational amplifier, Block diagram representation of a typical Op-Amp, Interpreting a typical set of data sheets,The Ideal Op-Amps,Equivalent Circuits of an Op-Amps,Ideal Voltage Transfer curve,Open Loop Op-Ams Configurations,Summing,Scaling,Average Amplifiers,

Analog to digital converters and Digital to analog converters,

Variable resistor networks, Binary Ladders D/A Converters, D/A Accuracy and resolution. A/D Converter – Simultaneous conversion, A/D Converter – Counter Method.

Text Books

1. D.D. Givone, 2002, ‘Digital Principles and design’, TMH. (3.1 to 3.9, 4.1 to 4.6, 4.8, 4.11, 4.14-1 to 4.14-3, 5.1-1, 5.1-2, 5.2 to 5.10,to 6.9, 7.1, 7.2)

2. Ramakant A. Gayakwad, 2008, ‘Op-Amps and Linear Integrated Circuits’, 4th Edition, PHI.(1.1 to 1.3, 2.2 to 2.6, 6.5, 8.11-1 and 8.11-2)

3. Malvino, Leach and Saha ‘Digital Principles and applications’, 6th Edition, 2007, TMH, ( 2.5, 3.11, 4.14, 6.12, 8.12, 9.7, 10.9, 12.1 to 12.6)

Reference Book:

1. R.D.Sudhakar Samuel, Logic Design - a simplified appraoch revised Edition, 2005, Sanguine Technical Publications.




|Hours/Week: 03 |CIE MARKS: 50 |

|Total Hours: 40 |SEE Marks: 50 |

Course Outcomes:

At the end of the course, the student will be able to:

1. Identify and apply basic concepts of set theory, arithmetic logic, proof techniques, relations, functions, graphs and trees.

2. Produce convincing arguments, conceive and/or analyse basic mathematical proofs.

3. Demonstrate an understanding of discrete structures and be able to determine their properties.

4. Apply the knowledge and skills obtained to investigate and solve a variety of discrete mathematical problems.

5. Represent the real-world problems in the form of graphs and solve them.

UNIT-I (10 Hours)

Fundamentals of Logic: Basic Connectives and Truth Tables, Logic Equivalence–The Laws of Logic,Logical Implication – Rules of Inference, The Use of Quantifiers, Quantifiers, Definitions and the Proofs of Theorems.

UNIT-II (10 Hours)

Review of set theory, Relations and Functions: Cartesian Products and Relations, Functions–Plain andOne-to-One, Onto Functions – Stirling Numbers of the Second Kind, Special Functions, The Pigeon-hole Principle, Function Composition and Inverse Functions, Properties of Relations, Computer Recognition-Zero-One Matrices and Directed Graphs, Partial Orders – Hasse Diagrams, Equivalence Relations and Partitions

UNIT-III (10 Hours)

Semigroups, Monoids, Groups: Semigroups and Monoids, Definitions, Examples, and ElementaryProperties, Homomorphisms, Isomorphisms, and Cyclic Groups, Cosets and Lagrange’s Theorem.

Introduction to Graphs: Definition of Graph, Applications of graphs, Finite and Infinite Graphs,Incidence and degree, Isolated Vertex, Pendant Vertex and Null graph

Paths and circuits: Isomorphism, Subgraphs, Walks, Paths and Circuits, Connected graphs, Disconnectedgraphs and Components, Euler graphs, Operations on graphs, Hamiltonian Paths and Circuits, Traveling Salesman Problem.

UNIT-IV (10 Hours)

Trees and Fundamental Circuits: Trees, Properties of Trees, Pendant vertices in trees, Distance andcenters in trees, Rooted and Binary trees, Counting trees, Spanning trees, Fundamental circuits, Finding all Spanning trees of a graph, Spanning trees in weighted graph.

Cut-Sets and Cut-Vertices: Cut-Sets, Some properties of a Cut-Set, All Cut-Sets in a graph, FundamentalCircuits and Cut-Sets, Connectivity and Separability, Network Flows, 1-Isomorphism, 2-Isomorphism.

Planar and Dual Graphs: Combinatorial Vs. Geometric Graphs, Planar Graphs, Kuratowski’s Two Graphs.

Text books:

1. Ralph P. Grimaldi, 2004., Discrete and Combinatorial Mathematics, 5th Edition, PHI/Pearson Education

2. Narasingh Deo, Graph Theory with Applications to Engineering and Computer Science, PHI.

Reference books

1. Dr. D.S. Chandrasekharaiah, Prism, 2005, Graph Theory and Combinatoics.

2. Chartrand Zhang, TMH, 2006, Introduction to Graph Theory.

3. Richard A. Brualdi, 4th Edition, Pearson Prentice Hall, 2004, Introductory Combinatorics,

4. Geir Agnarsson & Raymond Geenlaw, Pearson Prentice Hall, 2007, Graph Theory Modeling,Applications, and Algorithms.


Hrs/Week: 04 CIE Marks: 50

Total Hrs: 48 SEE Marks: 50

Course learning Outcomes:

At the end of the course students are able to:

1. Demonstrate the design and function of various units of digital computers

2. Analyze the execution of program and various functional units

3. Asses the performance of the digital Computer

4. Write an assembly programs

5. Develop a micro program for simple operation


12 Hours

Basic structure of Computers:

Computer types, Functional Units, Basic operational concepts, Bus structures

Machine instructions and programs:

Numbers, Arithmetic operations and characters, Memory locations and addresses, Memory operations, Instructions and instruction sequencing, Addressing modes, Assembly language , assembler directives, number notation , Basic I/O operations, Stacks and Queues, Subroutines, Encoding of machine instructions


12 Hours

Input/output organization:

Accessing I/O devices, Interrupts-Interrupt hardware , Enabling and Disabling Interrupts, Handling Multiple devices, controlling device requests, Exceptions, Direct memory access – Bus Arbitrations, Buses- Asynchronous Bus and Synchronous bus , Interface Circuits- Parallel port and serial port, Standard I/O Interfaces –Peripheral component interconnect Bus, SCSI bus, USB.


12 Hours

The memory system:

Some Basic concepts, Semiconductor RAM memories, Read only memories, Secondary storage - Magnetic Hard disks ,Optical Disks, Magnetic tape systems.

Arithmetic Unit:

Addition and subtraction of signed numbers, Design of fast adders, Multiplication of positive numbers, Signed operand multiplication, Fast multiplication.

UNIT-IV 12 Hours

Arithmetic Unit (Continued..):

Integer Division, Floating point numbers and operations – IEEE standard for Floating point numbers, Arithmetic operations on Floating point numbers. Implementing Floating point operations.

Basic Processing Unit:

Some fundamental concepts, Execution of complete instruction, Hardwired Control, Micro programmed control, Microinstructions, microprogram sequencing, Wide branch addressing, Microinstruction with next address field, Prefetching microinstruction


Processor Clock, Basic performance equation, pipelining and superscalar operations, Clock rate, Instruction set, compiler, performance measurement.

Text Books

1. Hamacher , Zvonko Vranesic, Safwat Zaky, 2002. ‘Computer Organization’, Fifth Edition, MGH.

(1.1 to 1.4, 2.1 to 2.5, 2.6.1, 2.6.3, 2.7 to 2.9, 2.12, 4.1 , 4.2.1 to 4.2.5, 4.4,4.5.1 to

4.5.2, 4.6 , 4.7, 5.1 to 5.3, 5.9, 6.1 to 6.7, 7.1 to 7.4, 7.5.1 to 7.5.4, 1.6)

Reference Books

1. J.P. Hayes , 1998, ’Computer Architecture and Organization ‘ , Third Edition, MGH.

2. William Stallings, 2007 ‘Computer Organization and Architecture’, 7th Edition, PHI.



|Hours/Week: 03 |CIE Marks: 50 |

|Total Hours: 40 |SEE Marks: 50 |

Course Objectives:

• To provide students with introduction to foundational principles of engineering management

• To develop sufficient problem solving skills through design and optimization exercises, project management assignments and case studies.

• To train students to identify, formulate and solve engineering management problems in a dynamic environment.

• To introduce students to management concepts, time management, planning and organizing.

• To introduce students to reliability issues, cost control, quality control management and simulation techniques.

Course Outcomes: At the end of the course, the student will be able to:

1. Build an understanding of need and functions of management, product and process development, concurrent engineering and technology protection processes in managing technology projects

2. Understand and follow the professional and ethical responsibilities.

3. An ability to select and apply knowledge of mathematics, science, engineering, and technology to engineering technology problems that require the application of principles and applied procedures or methodologies.

4. Describe and analyze the key concepts and principles of decision making, R&D management, leadership/ motivation styles and protection of ideas.

5. Estimate the financial profits/losses gained in the projects.

UNIT-I 10 Hours

Engineering and Management: Introduction, Definitions of Engineering and management. Managementlevels, About managers, Managerial skills, Managerial roles, Functions of managers, Process of management, Engineering management, Need for Engineers in Management, Management and Engineering Career. Historical Development of Engineering Management: Origins, The Industrial Revolution, Management Philosophies, Scientific Management, Administrative Management, Behavioral Management.

UNIT-II 10 Hours

Planning, Forecasting and Decision Making: Introduction, Nature of Planning, The Foundation forPlanning, Some Planning concepts, Forecasting-Quantitative and Qualitative methods, Strategies for Managing Technology, Nature of Decision Making, Management Science, Tools for decision making.

Organizing and some Human aspects of Organizing: Introduction, Nature of organizing, Traditionalorganization theory, Staffing Technical Organizations, Authority and power, Delegation, Committees and Meetings.

UNIT-III 10 Hours

Motivation and Leading Technical People: Motivation, Theory X and Theory Y, Content and Processtheories, Leadership: Nature of leadership, People/Task Matrix approaches, Situational Approaches. Controlling: Introduction, Process of control, Three Perspective on timing of control, Characteristics ofeffective control systems, Financial and Non-financial controls

UNIT-IV 10 Hours

Technology Management: Introduction, Product and Technology life cycles, Nature of Research andDevelopment, Research Strategy and Organization, Selecting R&D projects, Protection of Ideas: Patents and copyrights, Creativity: Nature of Creativity and Creative process, Characteristics of Creative People.

Managing Engineering Design: Introduction, Nature of Engineering Design, Systems Engineering/NewProduct Development: Phases/Stages, Concurrent Engineering and CALS, Control Systems in Design, Designing for Reliability: Significance, Reliability and Risk, Simple reliability models.

Text books:

1. Daniel L. Babcock and Lucy C. Morse, Managing Engineering and Technology, Prentice-Hall of India Private Limited, 2005, New Delhi, Third Edition.

Reference books:

1. Harold Koontz and Weihrich, Tata McGraw-Hill, 1998, Essentials of Management.

2. Don Hellrigel, John W. Slocum Jr. Addition-Wesley Publishing Company, 1991, Singapore ,

Management, 6th Edition.

3. James A. F. Stonner, Second Edition, Prentice-Hall of India Private Limited, New Delhi,


4. V. S. Bagad, Technical Publications, Pune, Engineering and Technology Management, Joseph L. Massie, Fourth Edition, Prentice-Hall of India, Pearson, 2003, Essentials of Management


|UCS317L | |1.5-CREDITS |

|Hours/Week: 03 | |CIE Marks: 50 |

|Exam Hours:03 | |SEE Marks: 50 |

Course Objectives.

1. To reinforce learning in the accompanying this course through hands-on experience with design, construction, and implementation of digital circuits.

2. To provide the student with the capability to use VHDL software as tools in the simulation of digital circuits, and in future courses, design projects, and professional work assignments.

Course Outcomes.

1. This course provides the foundation education in digital electronic circuit analysis and design. Through lecture, laboratory, and out-of-class assignments, students are provided learning experiences that enable them to:

2. Design, simulate and implement basic combinational and sequential logic circuits. Become proficient with computer skills (eg., VHDL language) for the analysis and design of circuits.

3. Acquire teamwork skills for working effectively in groups .

Practice Assignments using digital I C’s :

l Implementation of Boolean Expressions of basic logic gates such as 2-input/3-input AND,OR,NAND,NOR, EX-OR gates

l Simplification of simple Boolean Expressions in SOP/POS forms.

PART- A (Hardware Implementation)

1. Design a Binary to Gray Code converter with K map simplification and using basic Gates.

2. Given any 4-variable logic expression, simplify using K-MAP/Quine McCliskey and realize the simplified logic expression using 8:1 multiplexer IC.

3. Realize a full adder using 3-to-8 decoder IC and 4 input NAND gates.

4. Realize a full substractor circuit using 3 to 8 line decoder IC and 4 input NAND gate.

5. Realize a J-K Master/Slave Flip-Flop using NAND gates and verify its truth table.

6. Design and implement a mod-n (n> operator. Perform addition of two matrices by overloading operators + and display the results by overloading ................

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