Manufacturing with Intel® Stratix® 10 Field Programmable ...

Manufacturing with Intel? Stratix 10 Field Programmable Gate Arrays

Revision 1.1 Q1 2019

The information contained in this document is for reference only. Manufacturing processes are unique, and may require unique solutions to ensure an acceptable level of quality, reliability, and manufacturing yield. Due to differences in equipment and materials, and product design, further process parameter modifications/optimization may be required to meet your quality, reliability, and manufacturing yield requirements.

Legal Disclaimer

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Introduction

? This Manufacturing Advantage Services (MAS) course shares Intel knowledge to facilitate customer manufacturing excellence as an advantage service.

Note: Intel is a trademark of Intel Corporation or its subsidiaries in the U.S. and/or other countries.

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Module

Page Markings and Navigation Aids

Click on the house to go to a Table of Contents page.

These headers are links to modules.

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Revision History

? Revision 1.0: ? Original Document Release

? Revision 1.1: ? Document title update

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Module 1: Component Attributes and Drawings

Manufacturing with Intel? Stratix 10 Field Programmable Gate Arrays

MAS Revision 1.1 Q1 2019

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Overview ? Table of Contents

This course is divided into the following modules:

Module 1:

Component Attributes, Drawings and Land Pattern (PCB Pad)

1.1 Recommended PCB Pad Patterns

1.2 Package Side Details (Informational)

1.3 Package Attributes

1.4 Board Side Recommendations

Module 2:

Manufacturing Guidelines

2.1 SMT Assembly Process Recommendations

2.2 Post Reflow Cleaning Risk

2.3 Proposed Temporary Sealing Flip Chip Air Vent Process

2.4 SMT Rework Process Recommendations

2.5 Thermocouple Locations for Rework Thermal Reflow Profile

2.6 Intel? Lead-Free Rework Thermo Profile Graphic (for Stratix 10)

2.7 SMT Stencil Recommendations

2.7.1-.6 SMT & Rework Mini- Stencil F35, F43, F48, F50, F53, F55

2.8 X-Ray Exposure Time Recommendation*

Module 3:

References

3.1 Reference Documents 3.2 Intel? Learning Network access Information 3.3 Resource Design Center access Information

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1.1 Recommended PCB Pad Patterns

Module 1

F43 Package (42x42) - 4 = 1760 balls

F50 Package (49x49) - 4 = 2397 balls

F55 Package (54x54) - 4 = 2912 balls

42x42 grid: 42.5x42.5mm package

49x49 grid: 50x50mm package

54x54 grid: 55x55mm package

Pad Yellow Circle Green Circle

Definition Metal defined 20 mils (0.51 mm) round pad. Solder Mask Defined ? 20 mils (0.51 mm) SRO on a 24 mils (0.61 mm) round pad

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