PDF Defect and Yield Analysis of Semiconductor Components and ...

HELSINKI UNIVERSITY OF TECHNOLOGY Department of Electrical and Communication Engineering Optoelectronics Laboratory Espoo, Finland 2003

Defect and Yield Analysis of Semiconductor Components and Integrated Circuits

Mika Karilahti

Dissertation for the degree of Doctor of Science in Technology to be presented with due permission for public examination and debate in Auditorium S4 of the Department of Electrical and Communications Engineering at Helsinki University of Technology (Espoo, Finland) on the 14th of February, 2003, at 12 o'clock noon.

Helsinki University of Technology Department of Electrical and Communications Engineering Optoelectronics Laboratory P.O. Box 3500 FIN-02015 HUT Espoo Tel. +358-9-4511 Fax. +358-9-4513128

? Mika Karilahti 1993-2003 Contact information: Email: mika.karilahti@hut.fi , mika@ , URL: , Tel: +358-40-5487656

ISBN 951-22-6368-8 (Printed) ISBN 951-22-6370-X (PDF)

Picaset Oy Espoo, Finland 2003

ii

Abstract

Semiconductors were studied from the point of material, component, electrical and functional properties. Several methods were used to accomplish this, e.g. X-ray topography, etch pit analysis, statistical methods, and neural nets. The compound semiconductor components, i.e. GaAs varactor diodes, AlGaAs/InGaAs p-HEMTs, and LEDs (GaAs/AlGaAs and GaPN) were studied using the method of synchrotron X-ray topography. First, the silicon wafers studied were selected from fully processed lots with varying, though, low yields. The electrical circuits were fabricated with a CMOS (Complementary Metal-Oxide Semiconductor) process, well suited for mixed-signal applications. Then, synchrotron X-ray topographs and etch pit micrographs of the wafers were analyzed with an image processing software, written entirely for this study, to quantify the strain and defects present in the images. This information was then correlated with electrical parameters previously measured from the wafers, including the yield. Several of the parameters quantified from the synchrotron X-ray images show a strong correlation with certain measured parameters, e.g. PMOS transistor threshold voltage, polysilicon sheet resistance, N- sheet contact chain resistance. Then, some parameters practically do not correlate, e.g. NMOS breakdown voltage. A strong correlation of device yield with near-surface strain measured by synchrotron X-ray topography is found. Finally, the method of self-organizing map (SOM) neural net was applied to analyze a heartbeat rate monitor integrated circuit (IC) yield dependence on CMOS process control monitoring (PCM) data. The SOM efficiently reduces the PCM parameter space dimensions and helps in visualizing the different parameter relations. This makes it possible to identify the most probable PCM parameters affecting the yield. Those were found out to be NMOS transistor drain current and aluminum sheet resistance.

Keywords: semiconductor, compound semiconductor, wafer, component, part, device, measurement, synchrotron, x-ray, topography, etch pit, neural net, self-organizing map, SOM, integrated circuit, IC, CMOS, yield, process control monitoring, PCM, semiconductor process.

iii

iv

Preface

The work presented in this thesis has been carried out at the Optoelectronics Laboratory of Helsinki University of Technology in collaboration with Microelectronics Research Laboratory in Dublin, Institut in Freiburg, Germany, during 1993-2002. The synchrotron X-ray topography measurements were carried out at the Hamburger Synchrotronstrahlungslabor (HASYLAB) at the Deutches Elektronen-Synchrotron (DESY) in Hamburg, Germany. I want to thank all institutes for the facilities, resources, and services they have been able to provide, and all the very helpful people there. I wish to express my gratitude to my thesis supervisor Professor Turkka Tuomi for his support and patience with my post-graduate studies, Dr. Patrick McNally for his ideas, Professor Olli Simula for his advices, all my past and present colleagues at the Optoelectronics Laboratory, especially Dr. Markku Sopanen and Professor Harri Lipsanen. The warmest thanks to my father Thure and mother Auli for them supporting and encouraging me with my studies from the comprehensive school through to the University. I also want to thank my friends for their advices and help, also Markku Tilli from Okmetic for arranging the etch pit images, Kari Kivisalo for tifftopnm UNIX issues, and Anne Korkalainen for acquiring a collection of papers on gettering. To the persons, who are, or are not mentioned here - I want to thank you for all your help!

Espoo, 16 December, 2002 Mika Karilahti

Contact information: Email: mika.karilahti@hut.fi , mika@ URL: Tel: +358-40-5487656

v

 ................
................

In order to avoid copyright disputes, this page is only a partial summary.

Google Online Preview   Download